This is just for my notes on how I went about figuring out how disabling Intel’s turboboost on my Mac Book Pro to contain the heat. 2011 MacBook Pro & OSX
Intel Manuals & MSR:
one can find description of ModelSpecific Register (MSR), Sandy Bridge onwards, in
Power and Thermal Management chapter:
Just look for details on:
MSR IA32_MISC_ENABLE in
184.108.40.206 Discover Hardware Support and Enabling of Opportunistic Processor Operation
If an Intel 64 processor has hardware support for opportunistic processor performance operation, the power-on default state of A32_MISC_ENABLE indicates the presence of such hardware support. For Intel 64 processors that support opportunistic processor performance operation, the default value is 1, indicating its presence. For processors that do not support opportunistic processor performance operation, the default value is 0. The power-on default value of IA32_MISC_ENABLE allows BIOS to detect the presence of hardware support of opportunistic processor performance operation.
IA32_MISC_ENABLE is shared across all logical processors in a physical package. It is written by BIOS during platform initiation to enable/disable opportunistic processor operation in conjunction of OS power management capabilities, see Section 220.127.116.11. BIOS can set IA32_MISC_ENABLE with 1 to disable opportunistic processor performance operation; it must clear the default value of IA32_MISC_ENABLE to 0 to enable opportunistic processor performance operation. OS and applications must use CPUID leaf 06H if it needs to detect processors that has opportunistic processor operation enabled.
When CPUID is executed with EAX = 06H on input, Bit 1 of EAX in Leaf 06H (i.e. CPUID.06H:EAX) indicates opportunistic processor performance operation, such as IDA, has been enabled by BIOS.
Opportunistic processor performance operation can be disabled by setting bit 38 of IA32_MISC_ENABLE. This mechanism is intended for BIOS only. If IA32_MISC_ENABLE is set, CPUID.06H:EAX will return 0.
More details can be found in Manual Volume 4: Model-Specific Registers
2.1 ARCHITECTURAL MSRS
Many MSRs have carried over from one generation of IA-32 processors to the next and to Intel 64 processors. A subset of MSRs and associated bit fields, which do not change on future processor generations, are now considered architectural MSRs. For historical reasons (beginning with the Pentium 4 processor), these “architectural MSRs” were given the prefix “IA32_”. Table 2-2 lists the architectural MSRs, their addresses, their current names, their names in previous IA-32 processors, and bit fields that are considered architectural. MSR addresses outside Table 2-2 and certain bit fields in an MSR address that may overlap with architectural MSR addresses are model-specific. Code that accesses a model-specific MSR and that is executed on a processor that does not support that MSR will generate an exception.
However, the most interesting note is in
Table 2-3. MSRs in Processors Based on Intel® Core™ Microarchitecture:
Linux Intel driver:
A nice answer without intel_pstate at stackoverflow
Linux kernel has a driver to just do this:
intel_pstate (https://www.kernel.org/doc/html/v4.12/admin-guide/pm/intel_pstate.html), look for
These are various settings supported by
Interesting enough, here is some code that points to exactly how things are setup:
A few related articles here
OS X driver:
kext does the same thing as noted above:
Windows Power config:
With windows, it is quite easy- Just go to power config in power options and control the max freq.
Note: this switches off the Windows Modern Standby feature. I found it to be very cool and decided to not to muck around with these settings on my new laptop.
Some details here at stack overflow:
Adding following key allows you to disable
Processor Performance boost mode
Also, one can use tweaking tools like
i7 turbo as described here